Warpage of dies, redistribution layers, and interposers is a growing problem in multi-chiplet packages, and it can have a dramatic impact on the behavior and reliability of these devices. Multiple ...

Companies building the largest AI accelerators face a growing cost problem that has nothing to do with transistors. The expense of packaging those chips, connecting multiple silicon dies on a single ...

TSMC is pushing its advanced packaging roadmap beyond its CoWoS platform and the wafer-level multi-chip module (WMCM) — an enhanced InFO-PoP due in 2026 — with a new integration called ...

South Korean component maker LG Innotek announced on May 27 that it has made its first-ever appearance at the semiconductor packaging industry's largest conference, where it is pitching two substrate ...

The demand for high-performance devices, particularly in AI, HPC, and data centers, has surged dramatically in the ever-evolving landscape of integrated circuit technology. This demand has been ...